The present invention generally relates to a thin film transistor and, more particularly to a thin film transistor having an improved electrode construction less susceptible to dielectric breakdown.
Typically, four examples of thin film transistors such as shown in FIGS. 1 to 4 of the accompanying drawings, respectively, are well known.
The prior art thin film transistor shown in FIG. 1 comprises an electrically insulating material 1 of glass material having one planar surface formed with a gate electrode 2 formed of any one of Al, Au, Ta, Ni and In by the use of either a masking system for evaporation or a photolithographic technique, a gate insulating layer 3 formed of any one of Al.sub.2 O.sub.3, SiO, SiO.sub.2, CaF.sub.2, Si.sub.3 N.sub.4 and MgF.sub.2 by the use of a sputtering technique or a chemical vapor deposition technique so as to overlay the gate electrode 2, a semiconductor layer 4 formed of any one of CdSe, PbS and Te so as to overlay the gate insulating layer 3, and source and drain electrodes 5 and 6 deposited on the assembly in an electrically insulated relation to each other and usually made of such a material, for example, Au, Al, Ni or In, capable of making an ohmic contact with the semiconductor layer 4. In this construction, if the gate electrode is made of either Al or Ta, insulating layer 3 can be formed by the use of a known anodization process.
The thin film transistor shown in FIG. 2 corresponds to that shown in FIG. 1, but for the fact that the semiconductor layer 4 and the combination of the source and drain electrodes 5 and 6 are reversed in position to each other relative to that shown in FIG. 1.
In the thin film transistor shown in FIG. 3, the semiconductor layer 4 and the combination of the source and drain electrodes 5 and 6 are placed on the substrate 1 while the gate electrode 2 is placed on the top of the semiconductor layer 4 with the intervention of the gate insulating layer 3.
The thin film transistor shown in FIG. 4 corresponds to that shown in FIG. 3, but for the fact that the semiconductor layer 4 and the combination of the source and drain electrodes 5 and 6 being are reversed in position to each other relative to that shown in FIG. 3.
In each of the prior art thin film transistors shown respectively in FIGS. 1 to 4, although the gate insulating layer 3 is required to have a thickness as small as possible in order to enable the corresponding transistor to exhibit its favorable performance, the thickness is generally chosen to be within the range of 500 to 1,000 .ANG. for the purpose of avoiding any possible dielectric breakdown of the insulating layer 3.
However, when the prior art thin film transistor of the construction shown in any one of FIGS. 1 to 4 is used as a switching element for driving a matrix type liquid crystal display (not shown), it has been found that problems associated with dielectric breakdown occur. This will be described with reference to FIGS. 5 and 6.
When the source and the gate voltages of respective waveforms shown by (a) and (b) in FIG. 6 are applied to the source electrode 5 and the gate electrode 2 respectively, (Source Voltage: -10 Volt, Gate Voltage: -10 Volt, Duty Ratio: 1/10) and the voltage (i.e., drain voltage V.sub.D) across an equivalent composite capacitance C.sub.LC formed by respective capacitances of a segment electrode (not shown) and a storage capacitor both connected between the drain electrode 6 and the ground is such that shown by (c) in FIG. 6, dielectric breakdown of the insulating layer 3 tends to occur because of the reduced thickness of the insulating layer 3. The reason for this is as follows:
The present inventors have conducted a series of experiments with the use of, as a switching element for driving a matrix type liquid crystal display, many samples of thin film transistor of the construction which is shown in FIG. 1 and wherein both the source electrode 5 and the drain electrode 6 overlap the gate electrode 2 in a manner as shown in FIG. 7. When these thin film transistors have operated for a prolonged period of time being having applied the source and gate voltages of the waveforms (a) and (b) in FIG. 6, it has been found that dielectric breakdown of the insulating layer 3 occurred more frequently at a portion sandwiched between the source electrode 5 and the gate electrode 2 than at other portions as evidenced in the following table.
______________________________________ Locations Where Dielectric Breakdown Occurred Overlap Overlap Overlap between between between Elements 2 & 5 Elements 2 & 4 Elements 2 & 6 ______________________________________ Rate 99.83% 0.07% 0.10% Occurrence ______________________________________